Recently, with continuous advancements in image enhancement technology, various image processing algorithms are being developed. When desiring to apply an image enhancement algorithm to a high-resolution image which is called an ultra-high definition image and has a resolution of 4 K or 8 K, due to a large amount of data and the number of arithmetic operations, it is impossible to process the high-resolution image in real time with only a number of processors, and thus, the high-resolution image is processed by using a number of hardware accelerators.
The hardware accelerators are designed to accelerate data processing functions or arithmetic operations for enhancing a processing ability of a processor and increasing a processing speed. For example, like calculation of a mean, a standard deviation, a minimum/maximum value, and/or the like, an arithmetic operation which is generally performed in an image processing algorithm may be performed by a hardware accelerator. Also, like a finite impulse response (FIR) filter or a Huffman encoder/decoder, a function which is high in technical maturity may be performed by the hardware accelerator.
A processor controls a function performed by a hardware accelerator. For example, the processor may control the start and end of driving of the hardware accelerator. Also, the processor may set a parameter, which defines a certain function of the hardware accelerator, such as a horizontal length and a vertical length of an input image and a weight value of each of a plurality of pixels and may transmit a command to the hardware accelerator.
Moreover, the processor may process some image processing algorithms in software, in addition to a function of transmitting a control command to the hardware accelerator. Therefore, the processor executes the image processing algorithms and sets a parameter for controlling the hardware accelerator, and for this reason, a large overhead occurs. Also, when a number of hardware accelerators and processors access the same address of a memory for obtaining input data for the image enhancement algorithm, a memory stall occurs.